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Place and Route Flow  Development and  Implementation Engineer

2017-07-12T21:37:00+00:00 June 14th, 2017|Openings|

Place and Route Flow Development and Implementation Engineer Job Title Place and Route Flow Development and Implementation Engineer Department Engineering Location San Diego, CA SUMMARY: Working with the project design team, this individual will be responsible for completing physical implementation of all digital blocks required for the current project using the developed flows ESSENTIAL FUNCTIONS OF THIS POSITION: This role works to define and implement advance node repeatable place and route flows of high speed blocks, data path and chip level integration. The flows require implementation of: floor‐planning, power planning complex clock networks timing driven place and route extraction, static timing analysis, timing closure signal integrity DFM, IR/EM analysis Additionally: Resolving advanced node physical verification violations Resolving IR/EM violations Working with complex Low Power High Speed Designs QUALIFICATIONS/SKILLS: Timing driven place and route Static timing analysis, timing closure, signal integrity Hands on experience current place and route EDA tools Knowledge of advanced node design rules Programming and scripting using Tcl/Tk/Unix Shell (sh, bash, csh) Strong analytical, debugging and problem solving skills EDUCATION/EXPERIENCE BS in EE or CS required; MS strongly preferred 10+ years in flow development and implementation of digital blocks. SOC implementation is a plus Experience in all aspects of the place and route flow, RTL to GDSII ATTRIBUTES/APTITUDES/ATTITUDE Thrives in a highly collaborative and dynamic work environment Possesses a quality‐oriented mindset and attention to details Demonstrate superb communication skills Strong inner drive and self‐motivation Creativity in problem‐solving

Digital Verification Engineer 

2017-07-12T20:24:48+00:00 June 14th, 2017|Openings|

Digital Verification Engineer Job Title Digital Verification Engineer Location San Diego, CA Manager Director, Technical Design Engineering JOB PURPOSE: This position is for PHY transceiver digital blocks level and chip level verification. ESSENTIAL FUNCTIONS: Develop verification test plans and test cases that cover all system features of complex chip Writing/debugging test code/ test benches. Work closely with the design team to ensure timely delivery and quality designs. QUALIFICATIONS/SKILLS: Experience with expertise in the latest design verification methodology such as UVM, assertion based coverage driven verification, and Objected Oriented Programming. Experience with expertise in the chip level verification environments setup, code/function coverage collection, gate‐level verification setup. Proficient with modern design verification tools and languages (e.g. SystemVerilog, SVA, C++/SystemC, Perl, Unix Shell script) Expertise in verifying complex designs at SOC/chip and block levels. In depth knowledge of digital logic design and ASIC COT design flow. Strong debugging and problem solving skills. EDUCATION/EXPERIENCE BS/MS(preferred) in EE or CS 5+ working experience in the field of digital verification. ATTRIBUTES/APTITUDES/ATTITUDE Thrives in a highly collaborative and dynamic work environment Possesses a quality‐oriented mindset and attention to details Demonstrate superb communication skills Strong inner drive and self‐motivation Creativity in problem‐solving

High Speed Analog Designer

2017-07-12T20:25:25+00:00 June 14th, 2017|Openings|

High Speed Analog Designer Job Title High Speed Analog Designer Location San Diego, CA Manager Director, Technical Design Engineering JOB PURPOSE: This position is for transceiver high speed SerDes design, and verification. ESSENTIAL FUNCTIONS: Design low voltage low power  high speed SerDes Work closely with physical design team on custom layout QUALIFICATIONS/SKILLS: Experience with expertise in the design of high speed low voltage low power SerDes blocks up to 30Gbps, such as CTLE, VGA, driver, PLLs designs. Proficient with mixed‐signal designs tools and languages (e.g. Cadence ADE XL, Layout XL, AMS) Expertise in advanced technology nodes (40nm,28nm CMOS) mixed‐signal circuits front‐end design and back‐end physical design. In depth knowledge of mixed‐signal verification setup, such as AMS. Strong analytical, and problem solving skills. EDUCATION/EXPERIENCE MS/PhD in EE 8+ working experience in the field of high speed analog CMOS SerDes circuits design ATTRIBUTES/APTITUDES/ATTITUDE Thrives in a highly collaborative and dynamic work environment Possesses a quality‐oriented mindset and attention to details Demonstrate superb communication skills Strong inner drive and self‐motivation Creativity in problem‐solving

Digital DSP Designer

2017-07-12T20:25:48+00:00 June 14th, 2017|Openings|

Digital DSP Designer Job Title Digital DSP Designer Location San Diego, CA Manager Director, Technical Design Engineering JOB PURPOSE: This position is for transceiver digital DSP blocks design, and verification. ESSENTIAL FUNCTIONS: Design, verify, and VLSI implementation of various high speed digital PHY communication blocks. Work closely with the PHY system team to co‐verify DSP blocks. QUALIFICATIONS/SKILLS: Experience with expertise in the design and high speed implementation of communication data path DSP blocks, such as digital adaptive equalizer, digital timing recovery unit, AGC, and coded modulation. Proficient with modern system design tools and languages (e.g. C++/C, SystemVerilog, Perl) Expertise in co‐verifying complex DSP blocks. In depth knowledge of datapath synthesis, especially in advanced technology nodes(e.g. 40nm,28nm CMOS) Knowledge of high speed arithmetic implementation. SV/UVM based verification skill a plus Strong analytical, debugging and problem solving skills. EDUCATION/EXPERIENCE MS/PhD in EE 5+ working experience in the field of digital DSP ASIC design ATTRIBUTES/APTITUDES/ATTITUDE Thrives in a highly collaborative and dynamic work environment Possesses a quality‐oriented mindset and attention to details Demonstrate superb communication skills Strong inner drive and self‐motivation Creativity in problem‐solving

Luxtera Ships Industry’s First 2x100G PSM4 Silicon Photonics Embedded Optical Modules

2017-09-12T18:04:26+00:00 March 21st, 2017|Press Releases|

OptoPHY™ Embedded Optical Transceivers Provide Unmatched Price, Performance, Density and Reach LOS ANGELES, March 21, 2017 – OFC 2017 – Luxtera, the global leader in Silicon Photonics, today announced it is now shipping in volume the industry’s first 2x100G-PSM4 (Parallel Single Mode fiber 4-lane) embedded optical transceiver, designed for cloud

Luxtera Debuts Duplex 100G-CWDM2 Optical Transceiver Module at OFC 2017

2017-09-12T18:05:06+00:00 March 20th, 2017|Press Releases|

Luxtera’s 100G-CWDM2 silicon photonics transceiver module delivers industry leading cost/performance over single mode fiber LOS ANGELES, March 20, 2017 – OFC 2017 – Luxtera, the global leader in Silicon Photonics, today announced the sampling of its 100G-CWDM2 QSFP optical transceiver module. Leveraging Luxtera’s latest silicon photonics chipset, the LUX45202 optical

Luxtera to Offer High-Performance Silicon Photonics Platform with TSMC

2017-09-12T18:05:30+00:00 March 15th, 2017|Press Releases|

Carlsbad, CA, – March 15, 2017 – Luxtera, the global innovation leader in Silicon Photonics solutions, today announced that it has partnered with TSMC for next generation silicon photonics manufacturing. This cooperation enables key technologies for future cloud, mobile infrastructure, enterprise, and high-performance computing (HPC) platforms. Together Luxtera and TSMC are developing an innovative

Luxtera Ships One Millionth Silicon Photonic Transceiver Product

2017-09-12T18:06:06+00:00 September 16th, 2016|Press Releases|

Global Market Leader Crosses 1M Milestone as ECOC 2016 Kicks Off  Düsseldorf, Germany and Carlsbad, California – ECOC 2016 – September 19, 2016 – Luxtera, Inc., the global leader in silicon photonics, today announced that the company has shipped more than one million Silicon Photonic Parallel Single Mode fiber 4-lane (PSM4) transceiver